Changes between Version 1 and Version 2 of Ticket #364

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Timestamp:
02/20/09 18:13:20 (6 years ago)
Author:
rurban
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  • Ticket #364 – description

    v1 v2  
    11A strict 64bit cpu with a ptr_alignment=8 will break when reading pbc's or just frozen pmc's because our alignment when writing our bytecode is 16/ptrsize and not 16. 
    22 
    3 Any 64bit big-endian cpu with strict alignment is broken without '''-xmemalign=2i -xmemalign=2f -xmemalign=2s''' (the immediate workaround) 
     3Any 64bit big-endian cpu with strict alignment is broken without '''-xmemalign=2i''' (the immediate workaround) 
    44 
    55The goal should be to allow fast aligned code and to align as advertised to 16, not 2 on 64-bit. 
     
    4545 
    4646'''0x100000dec''' is not properly aligned. It must be '''0x100000df0'''. 
     47 
     48Sparc cc manpage: 
     49-xmemalign[=<a><b>] Controls memory alignment, <a>={1|2|4|8|16}, b={f|i|s}.[[BR]] 
     50Accepted values for b are: i Interpret access and continue execution. s Raise signal SIGBUS. f For variants of -xarch=v9 only. [reduced i]